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It remains important not to buy cores that you cannot use, especially if there are other constrained components that would have a larger performance impact.

Sophie Wilson (creator of the ARM instruction set) spends some time on these issues, also stressing core throttling and shutdown due to heat.

https://www.youtube.com/watch?v=zX4ZNfvw1cw

What is interesting is the observation that cost-per-transistor is rising:

"2018 was Apple’s last major step down in cost per transistor due to TSMC’s N10 to N7 process node shrink. With the transition from N7 to N5, the cost benefits were relatively small due to SRAM scaling issues. N7 is entering its 5th year of production, and N5 is now at its 3rd, yet the only hint of per wafer pricing changes have been in the wrong direction... Due to the way the 3 major DRAM companies have slowly increased output, cost per bit of DRAM has not really fallen."

Sophie Wilson (inventor of the original ARM instruction set) has been saying that cost-per-transistor has been rising for several years.

https://www.youtube.com/watch?v=zX4ZNfvw1cw

⬐ dylan522p

Sophie's analysis contemplates a set unit volume and fixed costs related to design and verification and tape out. Mine is on pure cost/transistor based on wafer costs as a player like Apple has the units to spread fixed costs over.

⬐ chasil

Thanks for the reply, and authoring the article.

I've had several objections to previous comments that cost-per-transistor is rising, and I'm glad to see another confirmation.

⬐ zozbot234

That's not a new observation, as you mention. However as trailing-edge nodes improve and mature, their cost-per-area should still tend to drop over time. So, in a way, Moore's law might still be full effect despite developments "running ahead of it" at the leading nodes.

The problem that the industry faces is that the economics and reliability of these chips have been undermined on the recent nodes.

Sophie Wilson has said that cost-per-transistor is rising since we shrank below 22nm, and that a 7nm die cannot run more than half of its transistors at the same time without melting.

Sophie addresses the cost rise at 22:00.

https://m.youtube.com/watch?v=zX4ZNfvw1cw

Heat is more of a problem because finfet can't dissipate as well as planar, and reliability is declining at smaller nodes.

"With a planar device, you do not have to bother about self-heating. There are a lot of ways to dissipate heat with a planar device, but with finFETs that is not the case. The heat gets trapped and there are few chances for that heat to get dissipated."

https://semiengineering.com/chip-aging-becomes-design-proble...

https://news.ycombinator.com/item?id=29889951

If I needed a 20-year service life, I would not choose 7nm.

Edit: I did not realize that ARM1 had fewer transistors (~25k) than the 8086 (29k), and over ten times less than the 80386 (275k). Intel should have bought ARM in the 80s; instead Olivetti got them.

⬐ bentcorner

Anecdotally, I recently had a CPU fail for the first time and it was a 7nm one. Sent it to AMD, they verified the failure and sent a new one back. Meanwhile I have had assorted 22nm/14nm processors around the house chugging along for years without any issues.

⬐ threatripper

This problem is not specific to Intel. Many chips are not using the smallest node sizes and old fabs get a second life producing those chips instead of CPUs. That could soon be the future for Intel fabs.

⬐ monocasa

That's where a fab goes to die. It needs to be fully capitalized at that point or else you don't have the money for R&D on leading edge. Intel going this direction is the direction of GloFo and no longer even attempting leading edge node production in the US anymore.

⬐ seanp2k2

We're going to need stuff like processors with built-in microfluidic cooling layers. Why not have club sandwich construction with every other layer working on heat extraction, power, or both? I see a future with cube-shaped processors with hundreds of layers.

⬐ monocasa

> Sophie Wilson has said that cost-per-transistor is rising since we shrank below 22nm

The data has been saying otherwise. 5nm is the only node that increased $/transistor beyond it's previous node (7nm), and that's at a time when Apple payed out the ass for a monopoly on the node except testing shuttle runs from competitors but isn't a sign of a fundamental increase in cost.

https://cdn.mos.cms.futurecdn.net/Unwdy4CoCC6A6Gn4JE38Hc-970...

> and that a 7nm die cannot run more than half of its transistors at the same time without melting.

That's true for trying to run multiGhz designs in classic plastic package BGAs like most cell phone chips, but that's been true for a while, hence why flip chip packages are a thing. Actually having a heat spreader connected to the die goes a long way.

Wilson's comments aren't incorrect from a certain point of view, but tend to get extrapolated out of her niche to the greater industry in a way that pushes the statements into inaccuracy.

⬐ chasil

Thanks, the cost per wafer does look convincing. I wonder where Wilson's figures emerged.

⬐ robotresearcher

Have the up-front plant costs grown out of proportion with the per-wafer costs?

⬐ monocasa

I think what's happening is that initially a node is more expensive, because of consolidation of the market and supply/demand amongst all of the fabless customers until capacity fully comes up. Once we're back into steady state we see the traditional economics of $/transistor falling.

That sort of coincides with TSMC having competitive, close to leading edge nodes (so the 28nm timeframe) which would line up with the rumor. The information simply hasn't been updated over the timeframe of the node. Previous to that the cost of the node was pretty fixed as long as someone like ARM cared about, now there's a lot more economic effects from the increased buyer competition that heavily changes final cost over time.

⬐ chasil

I believe her talk was from late 2017, so 7nm would have been expensive.

At the same time, AFAIK Intel was doing quite well at 14nm finfet even then (likely better than any other foundry?), but that production capacity was not available to ARM, so I guess it didn't count.

⬐ monocasa

Yeah exactly. I want to be clear, I've got a tremendous amount of respect for Sophie Wilson; she's a much better engineer and more connected to how the industry is going. Her statements simply require a lot more caveats than they are normally given. It's more about the much the changing position of ARM and TSMC in the market place than anything else.

> At the same time, AFAIK Intel was doing quite well at 14nm finfet even then (likely better than any other foundry?), but that production capacity was not available to ARM, so I guess it didn't count.

Yeah, and Intel was right in the middle of their biggest misstep. Intel 10nm was in risk production for Cannon Lake with awful yields and therefore a huge $/transistor. It got shipped anyway as one SKU in May of 2018 that didn't make financial sense (there's rumors that management bonuses were tied to that release), before being relegated to process improvements for years until just recently.

It would have been fair for her to extrapolate a trend there that actually ended up being more complex in hindsight.

Because these semiconductors are approaching fundamental limits of physics, it is unlikely that TSMC can achieve this status with anything like the current technology.

I think that Sophie Wilson said that cost-per-part is rising since we surpassed 22nm, heat is more of a problem because finfet can't dissipate as well as planar, and reliability is declining at smaller nodes. If I needed a 20-year service life, I would not choose 7nm.

Sophie addresses the cost rise at 22:00.

https://m.youtube.com/watch?v=zX4ZNfvw1cw

At JuliaCon 2018 in London, Sophie Wilson (Broadcom/ARM/Cambridge) gave an insightful overview about the "Future of Microprocessors", and she touched on this topic:

https://www.youtube.com/watch?v=zX4ZNfvw1cw