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David Patterson - A New Golden Age for Computer Architecture: History, Challenges and Opportunities

UBC Computer Science · Youtube · 107 HN points · 2 HN comments
HN Theater has aggregated all Hacker News stories and comments that mention UBC Computer Science's video "David Patterson - A New Golden Age for Computer Architecture: History, Challenges and Opportunities".
Youtube Summary
Abstract:

In the 1980s, Mead and Conway democratized chip design and high-level language programming surpassed assembly language programming, which made instruction set advances viable. Innovations like Reduced Instruction Set Computers (RISC), superscalar, and speculation ushered in a Golden Age of computer architecture, when performance doubled every 18 months. The ending of Dennard Scaling and Moore’s Law crippled this path; microprocessor performance improved only 3% last year! In addition to poor performance gains, Spectre recently demonstrated timing attacks on modern microprocessors that leak information at high rates.

The ending of Dennard scaling and Moore’s law and the deceleration of performance gains for standard microprocessors are not problems that must be solved but facts that if accepted offer breathtaking opportunities. We believe high-level, domain-specific languages and architectures, freeing architects from the chains of proprietary instruction sets, and the demand from the public for improved security will usher in a new Golden Age for computer architecture. Aided by open source ecosystems, agilely developed chips will convincingly demonstrate advances and thereby accelerate commercial adoption. The instruction set philosophy of the general-purpose processors in these chips will likely be RISC, which has stood the test of time. We envision the same rapid improvement as in the last Golden Age, but this time in cost, energy, and security as well as in performance.

Like the 1980s, the next decade will be exciting for computer architects in academia and in industry!
Bio:
David Patterson is a professor emeritus of Computer Science at UC Berkeley, a distinguished engineer at Google, and Vice-Chair of the Board of Directors of the RISC-V Foundation. He received his BA, MS, and PhD degrees from UCLA.
His most successful research projects were likely Reduced Instruction Set Computer (RISC), Redundant Array of Inexpensive Disks (RAID), and Network of Workstation (NOW). All three projects helped lead to multibillion-dollar industries. This research led to many papers and seven books, with the best known being Computer Architecture: A Quantitative Approach co-authored by John Hennessy, now in its sixth edition. His most recent book is The RISC-V Reader: An Open Architecture Atlas , co-authored by Andrew Waterman.

Patterson is a member of the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. His teaching was honored with the ACM Karlstrom Award and the IEEE Mulligan Medal. As a past president of ACM and a past Chair of CRA, he received Distinguished Service Awards from ACM, CRA, and SIGARCH and the Tapia Achievement Award for Scientific Scholarship, Civic Science, and Diversifying Computing.

His most recent award is the ACM A.M Turing Award, shared with John Hennessy, which is the highest award in computer science.
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Hacker News Stories and Comments

All the comments and stories posted to Hacker News that reference this video.
Apr 17, 2022 · 100 points, 25 comments · submitted by pjmlp
cosmiccatnap
The innovation we are all waiting on is an SSD which has the speed and performance of RAM such that they become one in the same. With some chip yields as low as 30% we are approaching the limit of shrinking transistors and the next 10 years of innovation will have to be architectural. The idea of photon computers is also a direction we will see more research into and might be about to get a 1mhz light processor by 2030
amelius
Persistent storage is not really a bottleneck. Single-threaded performance is. This is the innovation we are waiting for.
wallscratch
I thought modern computers are primarily cache limited and even running an os entirely on ram (on a system with no hdd/sdd) isn’t that much faster. I would be curious to see some data.
xyzzy21
In theory, that would be MRAM - SRAM speeds, Non-volatile. Except as should be expected - there are details that have to be worked out in depth to ever allow such a substitution.
imglorp
Are memristors still 5 years away or did HP bury those for business reasons?
WaxProlix
Yeah what's going on? I bought a chunk of HP stock 10 years ago on the assumption they'd be revolutionizing swaths of the computing industry and it never materialized.
astrange
I think if you have a bet like that it’d make more sense to buy a sector ETF.
UncleOxidant
> HP ... revolutionizing swaths of the computing industry

Heh... Yeah, I don't HP in it's current incarnation can revolutionize anything.

WaxProlix
That was sort of hyperbole, but the question stands :)
lisper
> The innovation we are all waiting on is an SSD which has the speed and performance of RAM

I've often wondered why no one offers a product that consists of DRAM with an integrated battery. Every portable device, when it goes into sleep mode, constitutes an existence proof that this could work. You could even integrate this with a regular SSD to provide persistence when the battery dies.

dboreham
This has been done for decades. For various reasons it hasn't become mainstream. Cost of DRAM is one of those reasons.
pkaye
They exist mostly for servers. The capacity is much smaller since DRAM is much more expensive.

http://www.ddrdrive.com/

Jason_Gibson
A company called Violin Memory used to make one for servers:

http://www.storagesearch.com/ssd-23.html

bXVsbGVy
You can create persistent ramdisk with tmpfs.

Add some batteries and a cronjob with rsync and you have the product you are looking for.

Avlin67
there even was NVDIMM
sophacles
This has existed in various forms through the years: https://en.wikipedia.org/wiki/RAM_drive (section: Dedicated hardware RAM drives)

It's non-existence (or at least extreme difficulty to locate)for current gen tech suggests that it doesn't improve performance enough to be worth the tradeoffs, but I'm not an expert in that at all.

torginus
I'm halfway through the talk and he keeps mentioning points that are strangely reminiscent of things that usually come up when people like Mike Acton talk about Data-Oriented-Design, and writing code for the PS3's PPE-s
pjmlp
Nowadays he is working on the DOTS/Burst compiler team at Unity.
leoc
As I've said before, I just find it hard to believe that the very foreseeable problems lurking at the intersection of speculation, cache and protected mode were really such an unexpected shock to the industry https://youtu.be/kFT54hO1X8M?t=1195 . I have a jaded suspicion that in fact a fair few people had some idea, but they said nothing and didn't look closely because it would have been no fun, and in some cases not career-enhancing, to be the Jeremiah calling for major CPU deoptimisations. OTOH the very security-researcher heroes whose reputation is built on collecting trophies didn't seem to say much either, so maybe everyone really was completely blindsided?
DSingularity
Yes they were shocked. And it is simply because even the most fundamental laws of security (eg security is not scheduled via obscurity) have flown and fly over the heads of architects. They don’t understand software beyond the smallest of kernels which dominate execution time. They don’t understand that attackers need one weakness to exploit a system. They don’t know how to objectively analyze systems to prioritize their weaknesses (eg seeing how the coexistence and sharing between mutually untrusting software is a potential threat).

That’s why the biggest computer architecture breakdown came from outside the comp arch community.

ynniv
I have anecdata that there were people who raised those exact concerns in those exact companies and were brushed off. If the companies were honestly surprised, it's because they purposely turned a deaf ear to the problem for the sake of greater revenue. But nothing really happened to those companies, so maybe it was ultimately a strategy that worked?
leoc
I can't help be reminded of the big US banks and sub-prime.
pocholo
huevo
alcover
Warning : video volume is low and cranking it up will rape your ears with sporadic screeching glitches.
vincent-manis
I had no problem with the volume when viewing this on my Mac in Safari.

I too consider the use of the word `rape' unfortunate.

human_person
Is it really necessary to use the term rape here?

I'd love to be able to browse hn threads on computer architecture without being reminded of the last time I (or a friend) was sexually assaulted.

And I dont think that particular term adds any clarity to your comment.

zozbot234
Like it or not hearing protection is not a joke, it has very real consequences for your health. Ear rape is absolutely a thing.
dang
Related:

A New Golden Age for Computer Architecture - https://news.ycombinator.com/item?id=19237702 - Feb 2019 (8 comments)

A New Golden Age for Computer Architecture - https://news.ycombinator.com/item?id=19023734 - Jan 2019 (84 comments)

Also related:

John Hennessy and David Patterson Turing Award Lectures (2018) [video] - https://news.ycombinator.com/item?id=18118957 - Oct 2018 (5 comments)

Hennessy and Patterson win Turing Award - https://news.ycombinator.com/item?id=16637803 - March 2018 (32 comments)

Dec 27, 2021 · 3 points, 0 comments · submitted by tambourine_man
The other talk Dr. Chris Lattner recommends watching is this one, and is very interesting

David Patterson - A New Golden Age for Computer Architecture: History, Challenges and Opportunities

https://www.youtube.com/watch?v=kFT54hO1X8M

I didn't realize IBM would have went with the Motorola 68000 for the IBM personal computer if Motorola had been ready. That would have been awesome for me because I could have applied my Mac 68000 asm skills to the much larger IBM PC market.

mwattsun
Towards the end he talks about some general rules he has found for a happy life.

    What Worked Well for Me [1] by David Patterson

    • Maximize Personal Happiness vs. Personal Wealth 
    • Family First! 
    • Passion & Courage 
        - Swing for the fences vs. Bunt for singles 
    • Friends may come and go, but enemies accumulate
    • Winning as Team vs. Winning as Individual 
        - "No losers on a winning team, no winners on a losing team" 
    • Seek Out Honest Feedback & Learn From It 
        - Guaranteed Danger Sign: "I'm smartest person in the room"
    • One (Big) Thing at a Time 
        - "It's not how many projects you start Its how many you finish"

    • Natural Born Optimist 
    
    [1] Full video: see "Closing Remarks", www2.eecs.berkeley.edu/patterson2016
Nov 11, 2021 · 4 points, 1 comments · submitted by guerrilla
guerrilla
From the Descrption:

"In the 1980s, Mead and Conway democratized chip design and high-level language programming surpassed assembly language programming, which made instruction set advances viable. Innovations like Reduced Instruction Set Computers (RISC), superscalar, and speculation ushered in a Golden Age of computer architecture, when performance doubled every 18 months. The ending of Dennard Scaling and Moore’s Law crippled this path; microprocessor performance improved only 3% last year! In addition to poor performance gains, Spectre recently demonstrated timing attacks on modern microprocessors that leak information at high rates.

The ending of Dennard scaling and Moore’s law and the deceleration of performance gains for standard microprocessors are not problems that must be solved but facts that if accepted offer breathtaking opportunities. We believe high-level, domain-specific languages and architectures, freeing architects from the chains of proprietary instruction sets, and the demand from the public for improved security will usher in a new Golden Age for computer architecture. Aided by open source ecosystems, agilely developed chips will convincingly demonstrate advances and thereby accelerate commercial adoption. The instruction set philosophy of the general-purpose processors in these chips will likely be RISC, which has stood the test of time. We envision the same rapid improvement as in the last Golden Age, but this time in cost, energy, and security as well as in performance."

"David Patterson is a professor emeritus of Computer Science at UC Berkeley, a distinguished engineer at Google, and Vice-Chair of the Board of Directors of the RISC-V Foundation. He received his BA, MS, and PhD degrees from UCLA. His most successful research projects were likely Reduced Instruction Set Computer (RISC), Redundant Array of Inexpensive Disks (RAID), and Network of Workstation (NOW). All three projects helped lead to multibillion-dollar industries. This research led to many papers and seven books, with the best known being Computer Architecture: A Quantitative Approach co-authored by John Hennessy, now in its sixth edition. His most recent book is The RISC-V Reader: An Open Architecture Atlas , co-authored by Andrew Waterman.

Patterson is a member of the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. His teaching was honored with the ACM Karlstrom Award and the IEEE Mulligan Medal. As a past president of ACM and a past Chair of CRA, he received Distinguished Service Awards from ACM, CRA, and SIGARCH and the Tapia Achievement Award for Scientific Scholarship, Civic Science, and Diversifying Computing."

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