HN Theater @HNTheaterMonth

If you want to see a relatively radical take on energy efficient computing (I'm sure it's not that radical if you work in the embedded space, but that's not my background so I can't say for sure), here's Chuck Moore talking about his GreenArrays chip with built-in Forth support:

https://www.infoq.com/presentations/power-144-chip/

⬐ agumonkey

ga144 are near sf to me

exchanging forth messages between cores seems so high level

I wonder if Moore is still thinking about improving these

⬐ vanderZwan

I guess one could argue that the elegance of Forth is that it's so minimal that you can get "high level" programming at a "low level" cost. However, the small print of "low level" cost mentions that this includes not having any types whatsoever ;)

⬐ honkybozo

Greetings from Greg Bailey in Cheyenne, Wyoming where GreenArrays can say, paraphrasing Steve McQueen at the end of the superb movie Papillon, "We're still here, you Bastards!!!"

As an experiment, I will be happy to address any question that anyone might have, including those appearing in this thread, at the GreenArrays shop and lecture hall in Second Life. I propose to stand there, virtually, at 0800 PDT / 1500 UTC / 1700 CET / Midnight in Sydney, AU, on Wednesday, 13 May and again on Saturday, 16 May. The SLURL for the shop is http://maps.secondlife.com/secondlife/Deneb/80/228/27 and the name of the shop is "GreenArrays Ventures". My name in SL is GregBailey with UUID f64abbc5-7136-40db-9dd0-a174d93d8742 and I will wait for one hour before logging if no one has shown up.

The experiment will be interesting, whether or not it produces positive results. Failing that I may find time to reply on these threads, and we do reply to questions sent to sales mailbox, domain greenarraychips.com.

So, see you Wednesday or Saturday, perhaps. Advice: To minimize wasted time, kindly go to http://www.greenarraychips.com and do a little studying, or perhaps audit some of the lectures on the arrayForth Institute that is linked from the above, or preferably both.

For the questions about what is it good for, anyone who can multiply the average power of a typical edge device in the "Internet of Things" by whichever fanciful power of ten (we are up to 12 now, are we not?) the Visionaries expect to exist of those edge devices, and then contemplate the obscene amount of average power that product represents, should be able to grasp that by wasting orders of magnitude less resources, including energy, than others do, we ought to be obviously good for something there if nowhere else:)

And now back to work on a software defined GPS receiver. I look forward to meeting anyone who might make it on Weds or Saturday!

I wish you well - Greg

⬐ honkybozo

Daniel Kalny and I waited the full hour in Second Life but no one else showed up. Daniel of course had never heard of Second Life but had no problem creating an account, making an avatar and finding the shop yesterday. Perhaps on Saturday I will see someone from this rather ephemeral thread :) Why ask questions but not come for answers? Best - Greg

⬐ honkybozo

Regrets, that was 0100 on appropriate day Sydney :)

⬐ honkybozo

I stood around for an hour and ten minutes this morning; Daniel could not make it due to a family afternoon outing in CZ. End of experiment, with negative results. However, thanks to whoever made the Second Life account RawNerve, but could not make it as "early" as 0800 PDT, for your interest. Back to emailing us if you have any questions. We do answer.

⬐ mastax

Reminds me a lot of the Parallax Propeller: many simple cores optimized for bit-banging I/O and programmable logic. Of course this is much lower power and has many more cores.

I think that many core architectures can actually be simpler to program in an embedded context than the traditional single core systems. It's akin to a hardware implementation of the actor model rather than an interrupt state machine or interrupt event loop. Being able to dedicate cores to single I/O tasks means you can bitbang almost anything. Here's HDMI running in a few lines of code on a Propeller 2 with no external components but the HDMI connector: https://forums.parallax.com/discussion/comment/1475075/#Comm...

⬐ fortran77

The DEFCON 22 badge was done on a Propeller. I did a little pokeing around on it--very interesting architecture. But they don't all run at once.... It's just a way to switch contexts instantly.

⬐ duskwuff

They do all run at once. All eight "cogs" exist as discrete hardware within the chip, and can perform operations on their cog RAM and I/Os simultaneously.

What doesn't happen all at once is access to main RAM. That's handled by a round-robin arbiter.

⬐ dkersten

That’s not what the datasheet says. It says:

”... its eight processors, called cogs, that can perform simultaneous tasks independently or cooperatively...”

” True parallel processing with eight symmetric 32-bit processors (cogs) in one microcontroller”

”20 MIPS per cog, 160 MIPS total with all cogs running”

”All eight cogs are driven from the System Clock; they each maintain the same time reference and all active cogs execute instructions simultaneously.”

https://www.parallax.com/sites/default/files/downloads/P8X32...

The shared hub memory is only accessible to one core at once and which one has access is switched between in round robin fashion, each core getting a turn to access it once every 16 clock cycles. Perhaps that’s what you were thinking of?

⬐ fortran77

Yes! Thanks! 8 years ago, it's hard to remember things.

⬐ gautamcgoel

I bought a propeller 1 as a teenager but never really did much with it... I recall that the propeller 2 is coming out soon, so perhaps it's time to jump back in!

⬐ amock

While it isn't ready for full production volumes you can purchase a Propeller 2 evaluation board right now.

⬐ richard_shelton

The chip is closer to AsAP [1] and XMOS xCore [2]. I remember that these two chips-competitors already existed when I was programming the predecessor of Greenarrays GA144. By the way, it was very fun to program these Forth-based processor arrays!

[1] https://en.wikipedia.org/wiki/Asynchronous_array_of_simple_p...

[2] https://en.wikipedia.org/wiki/XMOS

⬐ falava

Recorded at Strange Loop 2013. Please add (2013) tag.

Edit: https://thestrangeloop.com/2013/programming-a-144-computer-c...

⬐ dang

Added. Thanks!

⬐ mrighele

The grid layout and having chip(let?)s communicating with the four neighbors reminds me a lot of TIS-100 [1], I'm wondering if the game was inspired by this chip.

Hopefully the real chip is easier to program :-).

[1] https://store.steampowered.com/app/370360/TIS100/

⬐ cptnapalm

I swear that the line limitation in TIS-100 was just to drive me nuts. The shear number of times I just needed ONE MORE LINE... Loved that game.

⬐ ansible

Architecture and further details on the GreenArray chip:

http://www.greenarraychips.com/home/documents/index.html#GA1...

⬐ so_tired

Do they need to optimize for reduced memory/communication patterns? Or is that going too far

AFAIK, the memory-communication power can increase by orders of magnitude if u go off-core, off-chip, off-cache, etc.

⬐ bitbckt

A more accessible version of some of these ideas: https://www.parallella.org/

⬐ ngcc_hk

Can I repeat my question: how to get something on-hand (like the board, the programmer and even the working environment setup) per this document http://www.greenarraychips.com/home/support/index.html

It is very strange. It is like a shop without a front to get things, but keep on trying to tell you - once you got it, you can do wonderful thing.

What is the point?

⬐ honkybozo

You can place orders for chips and evaluation kits right on the website; take Product Offerings in the menu on the left side of the browser, and you will see this page: http://www.greenarraychips.com/home/products/index.html

⬐ so_tired

Do they need to optimize for reduced memory/communication patterns? Or is that going too far

AFAIK, the memory-communication power can increase by orders of magnitude if u go off-core, off-chip, off-cache, etc.

⬐ ngcc_hk

Strange it is all software like. Any hardware to see, to buy one or few times try, emulator to see etc. both the video and the YouTube by another guys seems no such thing.

⬐ honkybozo

See reply to your other post :)

⬐ dang

Discussed at the time: https://news.ycombinator.com/item?id=6940552

⬐ smolder

The title should probably read "144-core chip" or "144-core computer chip"

⬐ tachyonbeam

I saw this talk live at Strange Loop 2013, and I'm going to be a contrarian: I wasn't impressed. I don't mean to bash Chuck Moore. Forth is cool, and this chip looks neat, but my impression is that this is a solution looking for a problem. Chuck Moore is having a lot of fun working on it, but he fails to convey why this is useful.

The impression that I had is that the whole talk was Chuck Moore going "look at all the cool assembler tricks I can do!". At no point did he ever demonstrate how his chip could be used to solve anything resembling a real-world use case. Instead, what he demonstrated was that his architecture was very esoteric and impractical to use. Some time could have been spent explaining how this chip can do some common computation (matrix multiplication, image processing, anything) more efficiently than an ARM chip or something we're already familiar with.

He didn't really provide any benchmarks of anything, be it performance or power consumption, and my understanding was that, at the time the talk was given, based on the Q&A session, that he had no customers buying said chips (I wonder why?).

⬐ astrobe_

An ARM SoC chip has a lot of stuff inside: it has USART(s), SPI controller(s), I2C controller(s), SDRAM controller, sometimes LCD controller, USB controller, ethernet controller, a crypto coprocessor, graphic acceleration... Of which you only use a fraction.

It has logic to multiplex all those I/O to GPIO pins, and sometimes you have to choose between a second USB controller and a third UART.

Because all this gates eat a lot of current, it has a lot of logic to power off parts of the core.

In a way, popular ARM SoCs are a lot like bloated software.

I think the GA144 can replace a lot of this, without all the hardwired logic, with less gates, less power, less heat dissipation, and probably less pins.

Regarding his way of presenting it: I did cringe at times a little too. But at least he doesn't present it as silver bullet than can do anything easily with a C compiler and a Web programmer. Clearly his chip is as an oddball as his creator, so it requires some commitment.

⬐ petermcneeley

4mW running at 666 Mips. So is that 40W for 6.66 Tips ? If true then the perf/power is pretty decent. I could easily turn this in to a GPU.

⬐ kleer001

> this is a solution looking for a problem

Sounds like a bit of art to enjoy for its self.

⬐ tachyonbeam

And there's nothing wrong with that. I think programming is fun, and hardware design can be too. However, if you're a company trying to sell a product based on some specific claims, you probably should do more to convince potential users.

⬐ Koshkin

> should do more

When possible, sure; otherwise, selling stuff could be fun, too.

⬐ kick

They're making their second-generation chip right now, and I think there are a bunch of problems that this chip is an obvious solution for.

Chuck Moore is bad at presentations to outside audiences. This should surprise no one familiar with the man. This doesn't make the tech less useful, though.

⬐ kragen

Are they? You mean a generation following the GA144? That sounds really interesting! I see tantalizing tidbits on http://www.greenarraychips.com/: "Latest developments: As of early 2020, shipments of the EVB002 evaluation kit and of G144A12 chips continue. Work continues on improvement of the arrayForth 3 integrated development system. Design of a new chip, G144A2x, continues; this will be upward compatible with the G144A12, with numerous significant improvements."

That'll be really wonderful to see!

⬐ kick

Chuck Moore talked about it in a EuroForth interview a year or two ago; a company with a use in mind funded them, and he seemed really enthusiastic. They've updated the website a few different times since; that update is really recent. If you check archive.org you'll probably find interesting little hints. I agree, it's really cool!

⬐ 7thaccount

Which problems for those of us who don't find it obvious? I'm a big fan of Chuck and Forth in general, but I don't do any embedded work since college, so I don't have much personal use for this kind of system that I can think of.

⬐ kick

See my reply to a different comment:

https://news.ycombinator.com/item?id=23157949

AI is just the most obvious usage, though.

It'd be unimaginative to just consider embedded uses: there are terribly practical uses for it. Consider that most big companies buy hardware based on performance per watt, then consider that GA144 blows most things out of the water on that front.

GA also has a few recommendations (ripped from their site):

    APPLICATIONS 
     Energy harvesting applications 
     Portable devices 
     Remote sensing and data reduction 
     Ideal for parallel and/or pipelined work 
     Image processing 
     Complex control systems
     Cryptography 
     High speed signal processing 
     Simulation and synthesis 
     Inexpensive, massively parallel systems for research and education 
     Artificial intelligence, neural nets

⬐ RodgerTheGreat

Has there been any concrete information released about their second-generation chip? The GreenArrays website only contains a few vague hints, suggesting, for example, that it might have a 32-bit datapath.

⬐ kick

Not really; Moore mentioned it in an interview a couple of years ago and it might have came up during a fireside chat?

⬐ adwn

> [...] I think there are a bunch of problems that this chip is an obvious solution for

If those were really obvious, tachyonbeam wouldn't have to ask ;-)

In your opinion, what are problems for which this chip would be a solution?

⬐ kick

'tachyonbeam didn't ask.

The most obvious one is AI. These things are incredibly parallel & entirely self-contained, and a consumer desktop PSU could power countless amounts of them without a second thought. At $2,000 for 100 chips ($20/chip), you can start to do some really interesting stuff for the cost of a consumer laptop.

It's natural that AI is a problem this chip excels at, given Moore studied under McCarthy and all.

If you feel morally okay with playing with proprietary software, I really recommend playing a little bit with the simulator of the chip. Given what's intuitive with one or two, you'll probably be able to see the possibilities much better after an hour or so of play.

⬐ adwn

> The most obvious one is AI.

I seriously doubt that. The cores on that chip are extremely memory-limited: 72 bytes per core, that's about 10 kiB per Chip! And if you want to access SDRAM, you need an external SDRAM controller and bit-bang it. Gee, I wonder what that does to throughput and latency...

This chip's competition isn't GPUs and AI engines, but very low-cost, low-performance FPGAs, and it would probably lose. Given the extremely constrained environment of the individual cores (no cache, extremely little memory, a stack-based architecture), FPGAs are probably even easier to program.

There are no commercial applications, it's a toy.

⬐ gaze

I really love greenarrays and that entire social circle. It's an older group of folks that bought a historical house in Wyoming and do chip design, programming, everything with their own home-brew minimal set of software. It's an alternative universe of programming. It's almost a software and hardware design religion. I think everyone should know about it and that it's possible to work this way, even if you wouldn't personally want to. You may even find some of their arguments compelling. I love it.

⬐ fogus

> I think everyone should know about it

I would love to! Any further links to the life/work-style of said group?

⬐ gaze

I just warn you... I think the impulse is to look at this software and think "ok this stuff is kinda rough around the edges. I know, I'm gonna write my own IDE and Compiler and all that in my own language of preference, and use that instead." Do not do this. Learn their tools, their way of doing things, and really try to immerse yourself if you want to learn. Write your own FORTH. It really is a religion with strict opposition to unnecessary abstraction and complexity to a degree that will put most contemporary programmers off balance. If you go in with an open mind, you'll get a lot out of it.

⬐ gaze

I think it's more or less a continuation/extension of the ideas of FORTH. You should read their app notes and read the writing of Chuck Moore, Greg Bailey, Jeff Fox, Charley Shattuck, and other FORTH people to understand the ideas. I've also found very friendly to talk to over the phone.

⬐ fogus

From your original comment I got the impression that there was a Forth collective somewhere on a commune in Wyoming. I was VERY interested in that but will settle for the wisdom of the Forth luminaries.

⬐ elcritch

Here I was wondering how I never heard of the famed Forth collective of Wyoming... Still might visit them sometime just to see what cool things they might be doing. I wonder if they have a discussion venue there.

⬐ analognoise

These sound like my people. How does one join?

⬐ barbegal

Has anyone used the greenarray technology for any real world applications? It seems to fit somewhere between an FPGA and a microcontroller, but it doesn't seem that obvious to me what the benefits are, maybe less power than a microcontroller but I can't find any clear cut evidence that is the case for a real world application.

⬐ None

None

⬐ alaaalawi

you may find the following presentations in using ga144 entertaining, even if stretched. as Chuck Moore once said (I'm trying to get the ref) Forth is about sharing ideas rather than code. these videos are not pure coding session (even if they have their own share) but a mix of engineering and problem solving. - echolocation like bats - heart monitor - digital image processing - building ga144 controlled robot - low speed usb host

youtube channel of Daniel Kalný https://www.youtube.com/channel/UCVMrX6BlNjIeGfX0QcBobGg

hope you enjoy!

> it adds up to a big CO2 problem that nobody talks about

if you haven’t seen it already, you’d probably be interested in the below talk by chuck moore, inventor of forth.

https://www.infoq.com/presentations/power-144-chip/

⬐ johnr2

> https://www.infoq.com/presentations/power-144-chip/

Fascinating talk. Thanks for the link.

I watched a presentation on this chip at Strange Loop 2013. Unfortunately, the whole presentation was a sequence of "look at this cool cryptic programming trick I can do on this chip" by Chuck Moore, without a single legitimate use case outlined. It made the design look needlessly complicated to use and really didn't answer the question of why the chip is actually useful or in any way better than existing low-power microcontrollers. That says more about Chuck Moore's lack of marketing abilities than about clockless designs, however.

Strange Loop 2013 presentation: https://www.infoq.com/presentations/power-144-chip

For a relatively new design, the GreenArrays chip is highly unusual:

1) Asynchronous logic. 2) Stack machine design. 3) Extremely limited memory per cell. 4) 18-bit words. 5) No MMU.

Chuck Moore gave a nice presentation on applications and his rationale here: https://www.infoq.com/presentations/power-144-chip

I thought it was pretty neat how in some of his design docs, a column of async cores are used as a memory controller.

Related, Chuck Moore’s 2013 strangeloop talk on greenarrays: https://www.infoq.com/presentations/power-144-chip

Yes, see several minutes starting around 01:18 in this talk:

https://www.infoq.com/presentations/power-144-chip

As for efficiency, he mentions 7 picojoules per instruction in his forth chips.

Well, cellular automata are grid-based, so maybe something that makes use of that spatial aspect? The only thing I can think of right now is Chuck Moore's greenarrays, which is a grid of dedicated Forth chips wired together:

> Chuck Moore discusses what it takes to program a 144-core asynchronous chip that consumes only 7 pJ/inst, the idle cores taking just 100 nW while the active ones need 4mW running at 666 Mips: tight coding to minimize the number of instructions executed, reducing instruction fetches, transistor switching, and duty cycle.

https://www.infoq.com/presentations/power-144-chip

I don't think that in itself is a good fit, but maybe a good starting point to think about it alternative approaches?

As an aside, what you're saying about it being easier to build anything we understand well applies even more when working in groups, since it's a lot harder to find a solution to a problem without a shared baseline. So it makes a lot of sense that this approach was taken here.

My bad, my favorite wasn't on youtube, but infoq (thanks to them) https://www.infoq.com/presentations/power-144-chip

then https://www.youtube.com/results?search_query=chuck+moore+ga1...

https://www.youtube.com/watch?v=odBjuSCX8jE

and Kalny's videos https://www.youtube.com/watch?v=KSTjQA-iz4w

I've had a chance to watch the video, and I have to say I'm really impressed (and really irritated so much of the content is over my head :) hardware design is really fascinating!). I think it's pretty amazing I that I got to learn about this new CPU literally a week after it went public!

I have very little exposure to networked chip designs so I'm not sure how widespread they are, but the Neo architecture reminds me somewhat of the GA144 Forth microcontroller, except "done right." For example, the GA144 lets chips communicate their own stacks (= data) to their immediate neighbors, but you can simply access the memory on another node with the Neo. That allows the worst-case scenario of "I need to access this data and I know it'll be a bit slow" - the compiler can simply work to try to organize memory so that happens as little as possible. The GA144 affords no such option; the other cores need to be instructed to send the data over. Cute design, but much harder to use (even ignoring the fact that the GA144 is Forth).

(As an aside, https://www.infoq.com/presentations/power-144-chip is an interesting (40:12) watch, FWIW. (The video seems finicky so I archived it at https://goo.gl/WGNjuA.) That chip apparently uses 7pJ per instruction. I'm very curious if that's any good nowadays.)

I'm curious if the address space accessible on a given Neo core is "windowed", aka if the address can be remapped. 17:28 says "static routing", but I'm unsure if this affects the memory map. I have the notion that being able to remap would allow for some interesting optimizations, but would add a nontrivial amount of overhead to the chip design.

I think it's awesome you're going to be as open as you can (1:14:40) and release the simulator (1:13:27)!

After thinking about the simulator for a bit, I thought it might be an interesting idea to get it into the education sector for generic "learn RTL" type classes: the hands-down fastest execution/turnaround time makes for a very good pitch and could be an interesting way to get your foot in the door of what I'm presuming is a well-established/entrenched industry, and from there that could be a nice way to springboard into other directions.

Plus, not only does the fastest simulator mean better student engagement, there's also the nice property that everyone who trains on it will collectively groan and weep when they encounter the current "cutting edge" at their first job... best case scenario, you'll wind up with a pile of people who learned on your simulator and want to do real-world stuff at that speed. :)

Idea you've probably thought of but which I'll mention just in case: offering your proprietary optimization stack as an in-house enterprise version for $oh_hey_everyone_can_retire_now, along with a $cheaper subscription compilation-as-a-service version that accepts LLVM bitcode and spits back binaries ready for the "load" command. This would neatly solve many IP issues at once because it's very, very hard to "rip off" an optimizing black box. That said, this makes for some interesting security and trust considerations.

While thinking about all of this I was distinctly reminded of the way POWER8 has propagated. I don't read too much about it on HN, and as Generic Tinkerer #23817 I'm not really too aware of its progress. I think I can safely assume the architecture itself has a laundry list of facepalms; my hope is invested in the fact that it's fairly unencumbered compared to x86, and I hope it goes far. Thing is, it's really hard for me to play with it. I know RunAbove used to have one or two (?), I think either IBM China or a university group in China is offering confusingly restricted public access to some, you can watch the POWER8 nodes in OpenSuSE's build farm. That's about it; there was also the Talos Secure Workstation, but that failed its crowdsourced seed round, which is a huge shame.

My point is that, the simulator is likely going to suffice for most people's interests and purposes, but for the few that want >1MHz (or ±300kHz on the kinds of machines that are likeliest to be widespread in generic education), well, it would be kind of cool for this not to wind up as yet another thing that only hotshots in big industries get to play with, because this thing runs at 1GHz already and looks really interesting.

I envision a possible solution as a simple, fast pipeline that accepts LLVM bitcode (or source code - that works too), compiles it, sends it to a dev board (sitting in a pool of of 3 or 4), and returns the result. Besides queue waits and actual CPU runtime, I can't see the extra steps taking too long, and in ideal circumstances users could probably do several iterations per minute. 4 or 5 cards could very probably fit in a 2U enclosure with 1U more for an x86 blade to run a web server. I have no idea if this sort of thing would be appropriate for this architecture, I'm only thinking about general exposure, educational access, etc - I'd expect that the industry has well-established communications channels and that most of the people that are likely to be the most interested in this architecture either know about it or will know very soon.

Regarding running Linux, I totally get the focus on bare metal DSP-type applications, but I do wonder if there are any potential performance gains to be had from a compiler and kernel (Linux or another) designed to understand software-defined memory management. I wouldn't be surprised if Linux wasn't ideal as a general-purpose OS; besides not really being great at hard realtime, I suspect an "SDMMU" would be difficult to elegantly wedge into the memory management because of architectural assumptions made by all of the code that might thwart the optimizations that could otherwise be afforded.

Finally - after hearing the bit about the CDC 6800 in 1:18:21, I thought I'd mention this just in case (might be boring/irrelevant): a few months ago I stumbled on a (real) PDP-11/70 running RSX-11M-PLUS and TCP/IP, with an open guest account that anybody can use. I mention this in case you're curious to study its I/O characteristics or whatnot (since it's a real machine). You could probably do pretty much any kind of test you wanted on it - I've found that its owners have no issues with rebooting/fixing crashes. Very happy to share details (to anybody!); my email is in my profile, I fear the machine would get trampled if I mention it publicly (on here) :)

(And shoutout to using Nedit. Haven't seen that in a while!)

Thanks for your reply, and thanks for reading :)

Ever since I missed Chuck Moore's talk at Strange Loop a few years ago, I've been wanting to watch it. By all accounts it's quite good.

https://www.infoq.com/presentations/power-144-chip

Glad this piece popped up, time to finally watch it.

The only computer that interests me today: https://www.infoq.com/presentations/power-144-chip

I know I know

my most recent "non" von neumann discovery https://www.infoq.com/presentations/power-144-chip

⬐ brudgers

Date of talk was 2013.

Current pricing for GreenArrays products: http://www.greenarraychips.com/home/products/index.html

And for those (not quite) following along at home, there's a link in there (or in one of the other related links) to Moore's talk at Strange Loop 2013:

http://www.infoq.com/presentations/power-144-chip

Very interesting IMHO!

[edit: I'm delighted to see a little more of this chip, after being rather exited about it when it was first announced/launched (just not quite 450USD exited). There are some fascinating notes on Moore's (now dead?) eval blog[1], such as the notes on driving a VGA display:

http://www.colorforth.com/video.htm

[1] http://www.colorforth.com/haypress.htm

]

Chuck Moore's GreenArrays chips for Forth might be a source for inspiration.

http://www.infoq.com/presentations/power-144-chip?utm_source...

⬐ dmpk2k

The incredibly low-power usage of the chip is interesting, as is his perspective of counting the energy of each operation.

You can run the chip full-throttle with a solar panel the size of your hand, but where it shines is when it's not fully utilized. This is for (odd) general-purpose computation, not ASICs.

⬐ jballanc

Not sure how many people remember, but back in the PowerPC days of Macintosh, the OpenFirmware chips actually contained a Forth interpreter implemented in hardware. It always struck me that, should the need arise, you could use the Forth interpreter to write a bootstrap C compiler, then use that to build a proper C compiler and from there compile and load a minimal kernel. In other words, starting with bare metal you could, in theory, get to a fully functional desktop computer...

...one of these days maybe I'll actually have the time to find out if that really works in practice.

⬐ rbanffy

The OLPC XO machines also have it, as well as SPARC-based Sun workstations.

⬐ xradionut

If only a geek could buy the latest version of the OLPC laptop...

⬐ protomyth

If only a low-income parent could buy the latest version of the OLPC laptop for their child....

⬐ astrobe_

The thing that really stop you is to find good documentation about your hardware. Displaying a character on screen or sending a packet over the network without using system or BIOS calls will require you to pages after pages of very technical and not always well written documentation.

That said you can pick a very old PC with a functional floppy drive, and write a Forth interpreter under DOS in assembler. Then, you "just" have to replace the system call to DOS to read/write blocks to/from your blockfile with BIOS calls to read/write floppy disk sectors. You can even do that under DOS, provided you don't have anything valuable on your hard disk. This DOS-based Boostrap Forth should feature at least an editor, a mini-assembler and a self-compiler. Once you have that, you can make a bootable disk that boots on your standalone Forth interpreter (which has therefore been promoted to the rank of 'OS' ;-). With a very old 5MHz 8086 "laptop" featuring an half-broken single density floppy disk drive, one can boot, make a change in the kernel, recompile, then reboot and test the change within a minute. Those machines were power monsters. It's a pity that CGA cards didn't have shaders ;-).

⬐ fidotron

Chuck Moore is definitely one of the great computing heroes, especially if you're an idealist.

The problems with the GreenArrays product seem to be that it's too separated from the rest of the world, and in order to successfully interface peripherals (even SRAM, as covered in this video) to it requires completely grokking this alternate way of doing things, in addition to understanding the low level details of absolutely every interface.

Maybe I'm in the wrong circles, but right now if you can't shoot UDP packets out of something it doesn't really meet the minimum baseline for connectivity. If you're going to head off on your own (and certainly for energy purposes there would be good reason to do so) you need to have a simple bridge back to more standard land.

⬐ bart42_0

I completely agree on Chuck Moore being one of the computing heroes of the last 4 decades or so. As far as I can see it, he (or Forth or GreenArrays) needs proper communication/marketing/lobbying staff that ensures that his ideas are being understood by the politicians, decision makers and investors.

Power consumption and processors has always been an issue, they get to warm and need cooling, server parks consume huge amounts of energy, batteries wear out to quickly etc... Wouldn't it be nice if the surface of a tablet (I am talking about 2015-2020) contained a 10" solar panel, and the processors inside the tablet would need only the energy provided by this solar panel? that would be a nice start.

⬐ claystu

I have an interest in forth, the insights of Chuck Moore, and GreenArrays, which is why I was (1) so excited to watch this talk and (2) so disappointed in my in-ability to follow it. I'm not sure what kind of background you need for his talk to make sense, but whatever it is, I don't have it, which causes me to wonder how many people do. I'd guess less than 1 in a million.

Simply put: this speech was a marketing disaster...

If Chuck Moore really wants to sell these things, he needs to go back to "this is colorForth" and start at the beginning.

I hate to say it, but right now GreenArrays looks like an awesome solution in search of a problem.

⬐ None

None

⬐ honkybozo

Two of the GA144 evaluation boards on my bench here in my office both shoot UDP packets out to learn the date and time when they boot. UDP over IPv4 over bit-banged 10baseT. You may ping one of them at g144.minerva.com.

⬐ fidotron

That's on the standard eval boards? You've managed to get me interested in this rabbit hole again!

⬐ honkybozo

We have a little piggyback board with transformer, 10 MHz fox osc, and a dual op-amp to let us swing enough V to make the spec for twisted pair. Haven't started offering them publicly yet, but the code has been running two years. We gave an overview of the software defined NIC at SVFIG Forth Day 2012; video and powerpoint available thru SVFIG. The code is in the current arrayForth distribution. Still waiting for time to finish converting TCP to run on the 16-bit polyFORTH model but IP, ICMP, ARP, UDP all work. TCP only knows how to send a proper RESET.

⬐ None

None

⬐ losethos

I like mine.

biggot yikes a_screw_loose holier_than_thou the impossible just_between_us persistence repent The_good_stuff woot manufacturing FBI no_you_cant I'm_on_a_roll meek Yo completely bummer a_likely_story are_you_feeling_lucky ghetto

Mine is divine intellect, like the Bible. Right, God?

God says... Greek_to_me One_finger_salute pow duck_the_shoe Terry cowardice because_I_said_so delicious whazza_matter_for_you crazy no_more Watch_this what's_the_plan ice_cream slumin little_buddy I_could_be_wrong clever

⬐ vanderZwan

I've been looking forward to this one! I have a soft spot for eccentric inventors that challenge the status quo simply by doing things their way and not blindly following conventional wisdom. Even if you disagree with them it's good to have your assumptions challenged, if only because it makes you aware of the fact that you have them.

I would love to see this video. The only link I could find [1], unfortunately, was behind an auth wall restricted only to attendees of the event. Does anyone know where it might be found?

1. http://www.infoq.com/presentations/power-144-chip?utm_source...

⬐ puredanger

The video will be released for all in the next couple weeks.

⬐ astrobe_

There's some on youtube in the manufacturer's channel, Greenarray.

https://www.youtube.com/watch?v=NK1zlz67MjU

Also maybe try the designer's site, Chuck Moore. Google Colorforth.