HN Books @HNBooksMonth

This is awesome. One of the running bets I've had is how many chapters of Hennesy [1] you can implement in an FPGA. Early on it was hard to do more than basic RISC architectures, the 6502 Etc. Then you could do the Z80 which was a good cisc variant that had some excellent code tests. The 8086 and 68000 make for good follow on targets. At some point we should be able to do a VAX, its sort of a local maximum of CISCyness.

[1] http://www.amazon.com/Computer-Architecture-Quantitative-App...

⬐ derleth

> At some point we should be able to do a VAX

You mean a processor where all of the complex opcodes are implemented in loadable microcode?

⬐ spc476

You're thinking of the Perq (http://www.chiark.greenend.org.uk/~pmaydell/PERQ/). The VAX was probably implemented with microcode, but it wasn't that modifiable.

⬐ ChuckMcM

That's the one! I happen to have what is a fairly complete collection of all of the 'chip' VAX cpus (for Qbus) starting with the KA610 (MicroVAX I), through the KA692 (VAX 4000/700a), and its fascinating to watch the architecture go from a nearly pure microcode implementation to a nearly pure 'gate' implementation. From the perspective of looking at the tradeoffs of microcode vs gates it is really an excellent tutorial on computer architecture.

⬐ derleth

If we want a microcoded architecture, I'd prefer the PDP-10, but that's me.

How much more complex is a mostly-microcode VAX implementation compared to a MIPS? The point about being able to move stepwise up the hardware complexity ladder by progressively replacing microcode with gates is a really good one, though.

⬐ MaysonL

> I'd prefer the PDP-10

yeah, or a Foonly...

I was a computer science student in undergrad and grad school. None of the CS undergrad curriculums I was involved with (either as a student or as a TA) had this level of architecture for undergrad CS majors.

For the record, my grad class used Hennessy and Patterson (http://www.amazon.com/Computer-Architecture-Quantitative-App...). Also, I think that "summary" should indicate that the real thing will have "much more grueling detail."

⬐ KaeseEs

PH is the standard undergrad text for an arch course in much the same way as Wakerly is the standard for digital logic/components.

⬐ kd0amg

PH or HP? My intro course used Computer Organization and Design, and the senior course used Computer Architecture: A Quantitative Approach (both are by the same authors).

⬐ KaeseEs

Wow, didn't even realize the two authors had written two books on the subject. I meant the former and hadn't realized the parent of my post meant the latter, having not read the title after seeing the authors' names. Whoops!

Regarding point 2: Last time I checked (IIRC 2006-ish), there seemed to be common resentiment among scientists working in the area of programming language implementation that there is just too little ILP for successful wide-spread VLIW adoption (modulo some special use cases.)

AFAI(K|R), Hennesy and Patterson's cannonical text (CA-AQA [1]) reflects this: going from 3rd to 4th edition, we find a new chapter "Limits on ILP", VLIW/EPIC elements have been moved from the main contents to the CD-ROM, too (which probably is not a good indicator, though: the 3rd edition was just too heavy to carry it around a lot ;)

[1]: http://www.amazon.com/Computer-Architecture-Quantitative-App...

⬐ DarkShikari

There is plenty of ILP for VLIW in many real-world cases -- but the most common case is that where all the instructions in the VLIW are identical. This of course reduces to SIMD, which makes the VLIW unnecessary.